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 .About Newave

 .Products

   .PCM CODEC: 
  NW10XX series
     .1034
     .1068

   .DigitalSwitch Matrix: 
  NW15XX series
     .1500 & 1502
     .1506

 .FastLane-Voice over IP

　




    This picture is a block diagram for NW1034. Only Channel-0 is shown in detail, Channel-1, Channel-2 and Channel-3 have the same concept. Take Channel-0 as an example, the analogue signal from SLIC-0 comes to PIN VFXI-0 (Voice Frequency Transmit Input-0) first, after an Operation Amplifier (the Gain is Programmable), the signal comes to an A/D converter. After A/D, the signal is converted into digital signal, and processed by a DSP core, forming a PCM bit stream. The bit streams from Channel-1, Channel-2, Channel-3 come to the DSP too, and multiplexed in the DSP. After multiplexing, the bit streams from the four channels are formed into a single high speed bit stream, through PCM interface unit, output to the PCM BUS at PIN DX.

   Vise versa, a single high speed PCM bit stream coming from the back board PCM bus enters the CODEC at DR PIN, de-multiplexed into four channels, after D/A converter and an Operation Amplifier, an analogue signal comes out from PIN VFRO0 (or 1,2,3, for channel 1,2,3 respectively)

   FS is a frame synchronization signal, it is used to define the start/end point of a frame. BCLK is Bit Clock, used to define the boundary of the bit. TSX signal is used to indicate that DX pin is out putting bit steam.

   CO, CI CS CCLK is a serial interface to a micro-controller.

   I/O(0-1) and O(2-4) are 5 pins for SLIC communication.

   MCLK is the clock for DSP, it is not required to be synchronized with BCLK or CCLK.

　
  • NW1034 Main Features

  • Flexible:
    A-law / μ-law software selectable
    Gain programmable
    Dynamic time-slot assignment
    Timing mode software selectable

  • Intelligent:
    Automatic master clock recognizing

  • Convenient Interface:
    Serial interface to MCU
    5 signaling pins to SLIC

  • Saving Power:
    lower power consumption (100mw)
    Power-down mode programmable

  • Robust:
    Large latch-up current (100mA)
    High ESD Voltage (3500V)

  • A/u-Law Software Selectable 

  • Gain Programmable

-- Gain of each channel can be programmed
-- Gain of each direction (T/R) can be programmed
-- 14 bits, 16,384 steps for gain setting
-- Less than 0.01dB gain adjusting step

  • Dynamic Time-Slot Assignment

  • Timing Mode Programmable

  • Automatic Master Clock Recognition
--The Mast Clock is provided for the DSP
--The Mast clock is not required to be synchronized with BCLK
--The Mast Clock can be 2.048MHz, 4.096MHz or 8.192 MHz
--Automatically adapt to the frequency the Mast Clock
  • Serial Interface to MCU

     4 pins for serial communication with MCU

-- CI: Control Input
-- CO pin: Control Output
-- CCLK pin:Control Clock
-- CS pin: Chip Select.：

     A complete programming is at least consisted of two consequent bytes on CI pin. First byte starts with "1", and the second byte starts with "0".

  • 5 Signaling Pins to SLIC/per channel

     Two I/O pins: can be programmed as input or output.

-- Input: reflect SLIC status
-- Output: for testing or controla

     Three Output pins: for testing and control

  • Power Down Mode Programmable

    To save power, the idle channel can be set 
as power down.

      -- Each channel can be set power down.
      -- Each direction (T/R) can be set power down.
  • NW1034 Registers Definition

    1. Configuration Register (1)
    2. Time Slot Register (8 = 4 ch x 2 T/R)
    3. SLIC Control Register(4)
    4. SLIC Status Register (4)
    5. Gain Adjustment Register (16)

  • Applications of NW1034
  • Center Office Switching Machine
  • PBX
  • Integrated Data/Voice Access
  • Pair-gain systems

　
　
　
　

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